The present invention relates to a power-on reset circuit, and more particularly, to a power-on reset circuit capable of reducing standby current.
Generally, registers in a chip maintain floating state by a device or a micro controller unit (MCU) before applying power. When the power supply is applied to the chip in the floating state, the registers in the chip set to an undesired condition. Also, when the power supply drops under a predetermined voltage, a macro block in the chip becomes unstable.
The power-on reset circuit prevents the chip from becoming unstable by generating a reset signal for itself without a separate reset circuit outside of the device, where the chip can become unstable when the power is ramped up or downed at startup. The power-on reset circuit detects whether an internal voltage drops under a predetermined level and when the voltage drops under the predetermined level, the power-on reset signal is generated so as to initialize.